Timing Properties and Correctness for Structured Parallel Programs on x86-64 Multicores - Dataset

<p>Multicore architec- tures are increasingly common, but real architectures have unpredictable timing properties, and even correctness is not obvious when systems are built on the relaxed-memory concurrency models that are enforced by commonly-used hardware. This paper takes a rigorous approach to correctness and timing properties, examining common locking protocols from first principles, and extending this through queues to structured parallel constructs. We prove functional correctness and derive simple timing models, extending these for the first time from low-level machine operations to high-level parallel patterns. Our derived high-level timing models for structured parallel programs allow us to accurately predict upper bounds on program execution times on x86-64 multicores.&nbsp;</p> <p>&nbsp;</p> <p>This package contains all the datasets from the paper.</p>