Koios benchmarks' netlist files (BLIF format)

<p>Koios is a benchmark suite for FPGA architecture and CAD exploration. It contains circuits from the Deep Learning domain.</p> <p>Here we are uploading the netlist files for these designs obtained by synthesizing the Verilog designs using Intel Quartus for Intel Stratix IV&nbsp;architecture.&nbsp;</p> <p>For more details see:&nbsp;</p> <p>https://docs.verilogtorouting.org/en/latest/vtr/benchmarks/#koios-benchmarks</p> <p>https://github.com/verilog-to-routing/vtr-verilog-to-routing/tree/master/vtr_flow/benchmarks/verilog/koios</p>