Wafer defect map & binning
Detect, locate, size, and bin defects across a wafer into a spatial map.
Example outputs shown for illustration. Numbers depend on your samples and protocol.
What you get
The measurement, today
Defects are reviewed one image at a time and tallied on a sheet. Spatial signatures such as edge rings, radial scratches, and cluster hot spots only emerge when someone plots them by hand.
What it costs
The pattern of defects across a wafer points at the tool that caused them. Without a fast map, a drifting chamber keeps printing scrap while review works through a backlog.
From image to reviewed result
- 1
Scan the wafer
Tile optical or SEM images across the wafer surface.
- 2
Detect and size
Every defect is segmented, located, and measured.
- 3
Bin by class
Defects are sorted into classes such as particle, scratch, and pattern defect.
- 4
Map and flag
Defects are plotted to wafer coordinates and spatial signatures are flagged.
Scope: Detects and classifies defects visible in the images provided. Killer-versus-nuisance calls depend on your device rules and should be confirmed against electrical test.
Related applications
Semiconductor defect patterns
Classify wafer-map patterns and quantify defect clusters and densities.
Critical dimension (CD) metrology
Line width, space, and via diameter measured from top-down images, with per-feature tables.
Photoresist pattern defects
Detect resist pattern collapse, bridging, footing, and scumming after develop.
Send a sample image and a measurement goal
We will show the closest ConductVision workflow and flag what needs custom validation for your images.
